Capacitance–Voltage Characterization of La$_{2}$O$_{3}$ Metal–Oxide–Semiconductor Structures on In$_{0.53}$Ga$_{0.47}$As Substrate with Different Surface Treatment Methods-Reference-Cited by-同舟云学术

Capacitance–Voltage Characterization of La$_{2}$O$_{3}$ Metal–Oxide–Semiconductor Structures on In$_{0.53}$Ga$_{0.47}$As Substrate with Different Surface Treatment Methods

Published:2011-10-20 Issue:10 Volume:50 Page:10PD03
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:en
Short-container-title:Jpn. J. Appl. Phys.

Author:

Zade Dariush,Kanda Takashi,Yamashita Koji,Kakushima Kuniyuki,Nohira Hiroshi,Ahmet Parhat,Tsutsui Kazuo,Nishiyama Akira,Sugii Nobuyuki,Natori Kenji,Hattori Takeo,Iwai Hiroshi

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

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1. Benchmarking Nanotechnology for High-Performance and Low-Power Logic Transistor Applications

2. Ultimate Scaling of CMOS Logic Devices with Ge and III–V Materials

3. Scaling MOSFETs to 10 nm: Coulomb effects, source starvation, and virtual source model

4. Pre-atomic layer deposition surface cleaning and chemical passivation of (100) In0.2Ga0.8As and deposition of ultrathin Al2O3 gate insulators

5. Enhancement-Mode GaAs MOSFETs With an $\hbox{In}_{0.3} \hbox{Ga}_{0.7}\hbox{As}$ Channel, a Mobility of Over 5000 $ \hbox{cm}^{2}/\hbox{V} \cdot \hbox{s}$, and Transconductance of Over 475 $\mu\hbox{S}/\mu\hbox{m}$

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