Novel 2-Bit/Cell Metal–Oxide–Nitride–Oxide–Semiconductor Memory Device with Wrapped-Control-Gate Structure That Achieves Source-Side Hot-Electron Injection
Author:
Publisher
IOP Publishing
Subject
General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Multi-level 2-bit/cell operation utilizing Hf-based metal/oxide/nitride/oxide/silicon nonvolatile memory with HfO2 and HfON tunneling layer;Japanese Journal of Applied Physics;2022-01-13
2. The investigation of charge loss mechanism in a two-bit wrapped-gate nitride storage nonvolatile memory;Applied Physics Letters;2010-11
3. Two-Bit/Cell Characteristics of Silicon–Oxide–Nitride–Oxide–Silicon Flash Memory Devices with Recessed Channel Structure;Japanese Journal of Applied Physics;2008-04-25
4. Optimized ONO thickness for multi-level and 2-bit/cell operation for wrapped-select-gate (WSG) SONOS memory;Semiconductor Science and Technology;2007-12-06
5. Length Effect of Spacer-Type Storage Node in High-Density 2-bit/Cell Silicon–Oxide–Nitride–Oxide–Silicon NOR Flash Cell Based on Recessed Channel Structure;Japanese Journal of Applied Physics;2007-10-09
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