Fabrication of Vertical InGaAs Channel Metal–Insulator–Semiconductor Field Effect Transistor with a 15-nm-Wide Mesa Structure and a Drain Current Density of 7 MA/cm2
Author:
Publisher
IOP Publishing
Subject
General Physics and Astronomy,General Engineering
Link
http://stacks.iop.org/1882-0786/3/i=8/a=084101/pdf
Reference14 articles.
1. 30-nm InAs Pseudomorphic HEMTs on an InP Substrate With a Current-Gain Cutoff Frequency of 628 GHz
2. InP Hot Electron Transistors with a Buried Metal Gate
3. Current Gain and Voltage Gain in Hot Electron Transistors without Base Layer
4. Increase in Collector Current in Hot-Electron Transistors Controlled by Gate Bias
5. Cutoff frequency characteristics of gate-controlled hot-electron transistors by Monte Carlo simulation
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1. Scaling limit for InGaAs/GaAsSb heterojunction double-gate tunnel FETs from the viewpoint of direct band-to-band tunneling from source to drain induced off-characteristics deterioration;Japanese Journal of Applied Physics;2016-06-21
2. MOSFET with III-V Channel;IEEJ Transactions on Electronics, Information and Systems;2016
3. Body width dependence of subthreshold slope and on-current in GaAsSb/InGaAs double-gate vertical tunnel FETs;Japanese Journal of Applied Physics;2015-03-23
4. High Open-Circuit Voltage Gain in Vertical InGaAs Channel Metal–Insulator–Semiconductor Field-Effect Transistor Using Heavily Doped Drain Region and Narrow Channel Mesa;Japanese Journal of Applied Physics;2013-04-01
5. Role of InAs and GaAs terminated heterointerfaces at source/channel on the mixed As-Sb staggered gap tunnel field effect transistor structures grown by molecular beam epitaxy;Journal of Applied Physics;2012-07-15
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