Author:
Widiez Julie,Hartmann Jean-Michel,Mazen Frédéric,Sollier Sébastien,Veytizou Christelle,Bogumilowicz Yann,Augendre Emmanuel,Martin Mickael,Gonzatti Frédéric,Roure Marie-Christine,Duvernay Julien,Loup Virginie,Euvrard-Colnat Catherine,Seignard Aurélien,Baron Thierry,Cipro Romain,Bassani Franck,Papon Anne-Marie,Guedj Cyril,Huyet Isabelle,Rivoire Maurice,Besson Pascal,Figuet Christophe,Schwarzenbach Walter,Delprat Daniel,Signamarcheix Thomas
Abstract
Bulk silicon device technologies are reaching fundamental scaling limitations. The 28 nm and 22 nm technology nodes have seen the introduction of Ultra-Thin Body and Buried Oxide Fully Depleted SOI (UTBB-FDSOI) devices and FinFETs, respectively. Fully Depleted transistor technologies are mandatory to suppress short channel effects. Today, all major research and development alliances state that the silicon and its Fully Depleted transistor technologies have the potential to address roadmap requirements down to the 10nm node. Innovations will be necessary for lower, more advanced node (under 10nm). Specifications are to continue to ensure a good electrostatic control while providing excellent electrical performance. To meet these demands, several research areas (substrate engineering as well as multiple gate devices and 3D integration) will be involved in integrated circuit fabrication. This paper reports our latest achievements in SOI-type bonded substrates for advanced technology nodes.
Publisher
The Electrochemical Society
Cited by
19 articles.
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