Author:
Cui Hushan,Xu Jing,Gao Jianfeng,Xiang Jinjuan,Lu Yihong,Tang Zhaoyun,He Xiaobin,Li Tingting,Luo Jun,Wang Xiaolei,Tang Bo,Yu Jiahan,Yang Tao,Yan Jiang,Li Junfeng,Zhao Chao
Abstract
In this work, PVD and ALD TaN were evaluated as wet etch stop layer (WESL) in order to selectively remove TiN & Ti in the high-k/metal gate (HKMG) gate last CMOS integrations. The selectivity of TiN & Ti towards PVD or ALD TaN is achieved at least 5.6 with an ammonia hydrogen peroxide mixture (APM). In case of PVD TaN, nitrogen content in the film has great impact on its chemical resistance. Both of PVD and ALD TaN have enhanced thickness loss by the APM in presence of TiN & Ti. Based on the C-V results of MOS capacitor (MOSCAP), it can be concluded that both PVD and ALD TaN can be introduced into the CMOS integrations as WESL. But, for p-type body MOSCAP (nMOS), ALD TaN thickness should not exceed 1nm. Thanks to excellent filling capability of ALD TaN, it can be extensively used in advanced CMOS technology as WESL.
Publisher
The Electrochemical Society