Author:
Aceto Luca,Burgueno Augusto,Larsen Kim G.
Abstract
In this paper we develop an approach to model-checking for timed automata via reachability testing. As our specification formalism, we consider a dense-time logic with clocks. This logic may be used to express safety and bounded liveness properties of real-time systems. We show how to automatically synthesize, for every logical formula phi, a so-called test automaton T_phi in such a way that checking whether a system S satisfies the property phi can be reduced to a reachability question over the system obtained by making T_phi interact with S. <br />The testable logic we consider is both of practical and theoretical interest. On the practical side, we have used the logic, and the associated approach to model-checking via reachability testing it supports, in the specification and verification in Uppaal of a collision avoidance protocol. On the theoretical side, we show that the logic is powerful enough to permit the definition of characteristic properties, with respect to a timed version of<br />the ready simulation preorder, for nodes of deterministic, tau-free timed automata. This allows one to compute behavioural relations via our model-checking technique, therefore effectively reducing the problem of checking the existence of a behavioural relation among states of a timed automaton to a reachability problem.
Publisher
Det Kgl. Bibliotek/Royal Danish Library
Cited by
3 articles.
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1. A Timing Analysis of AODV;Lecture Notes in Computer Science;2005
2. The power of reachability testing for timed automata;Theoretical Computer Science;2003-05
3. Model checking via reachability testing for timed automata;Tools and Algorithms for the Construction and Analysis of Systems;1998