Estimating adders for a low density parity check decoder

Author:

Phillips Braden J.,Kelly Daniel R.,Ng Brian W.

Publisher

SPIE

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Efficient Approximate Adders for Fast Arithmetic in Energy-Saving Applications;2024 16th International Conference on Electronics, Computers and Artificial Intelligence (ECAI);2024-06-27

2. Comprehensive Analysis of Input Order Invariant Approximate 4-2 Compressors for Binary Multipliers;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

3. Design of Approximate Full Adders for Error Resilient Applications;2023 International Conference on Computer and Applications (ICCA);2023-11-28

4. Modified Low Power High Speed Approximate Adders For Energy Efficient Arithmetic Applications;2023 15th International Conference on Electronics, Computers and Artificial Intelligence (ECAI);2023-06-29

5. Novel Approximate 4:2 Compressor for Multiplier Design;Lecture Notes in Electrical Engineering;2022-12-01

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