Current induced annealing and electrical characterization of single layer graphene grown by chemical vapor deposition for future interconnects in VLSI circuits

Author:

Prasad Neetu1,Kumari Anita1,Bhatnagar P. K.1,Mathur P. C.1,Bhatia C. S.2

Affiliation:

1. Department of Electronic Science, University of Delhi South Campus, Benito Juarez Road, New Delhi 110021, India

2. Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576

Funder

Indian Nanoelectronics User Program, IIT Bombay, India

Publisher

AIP Publishing

Subject

Physics and Astronomy (miscellaneous)

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5. C. W. Chang , C. L. Gan , C. V. Thompson , K. L. Pey , W. K. Choi , and M. H. Chua , in Proceedings of the Symposium on Physical and Failure Analysis of Integrated Circuits, 7-11 July 2003, pp. 69–74.

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