3D NAND flash memory based on junction-less a-Si:H channel with high on/off current ratio

Abstract

As the key hardware unit of computing in memory, 3D NAND flash memory has been the focus of the artificial intelligence (AI) era due to its high efficiency in processing massive and diverse data, which is superior to the conventional von-Neumann architecture. To push the realization of computing in a memory chip, 3D flash memory with a large on/off current ratio and simple fabrication technology is highly demanded. Here, we first report that 3D NAND flash memory with a high on/off current ratio can be obtained by tuning the width of the a-Si:H channel without a junction. Compared with the traditional 3D NAND flash memory consisting of a polysilicon channel, the junctionless a-Si:H channel can be obtained at low temperature without doping, which can reduce the difficulty induced by the diffusion and the distribution of the doping atoms. Only by tuning the width of the junctionless a-Si:H channel from 0.3 to 0.2  μm, the on/off current ratio increases from 102 to 106. The analysis of ESR and Fourier transform infrared spectroscopy reveals that the positive charge induced by the Si dangling bonds in the narrower a-Si:H channel results in the formation of a thicker depletion layer, which is beneficial to efficiently control the negative charge in the a-Si:H channel. The strong coupling of the thinner charge layer and the electric field of gate bias is the origin of the high on/off current ratio from the narrower a-Si:H channel. Our successful fabrication of 3D NAND flash memory based on the junctionless a-Si:H channel with a high on/off current ratio provides a new way to construct a hardware unit for computing in-memory.