Electrical properties of buried oxide–silicon interface
Author:
Publisher
AIP Publishing
Subject
General Physics and Astronomy
Link
http://aip.scitation.org/doi/pdf/10.1063/1.362958
Reference24 articles.
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3. 0.1- mu m-gate, ultrathin-film CMOS devices using SIMOX substrate with 80-nm-thick buried oxide layer
4. Microstructure of SIMOX buried oxide, mechanisms of defect formation and related reliability issues
5. Characterization of carrier generation in enhancement-mode SOI MOSFET's
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1. Study of the side gate junctionless transistor in accumulation region;Microelectronics International;2016-05-03
2. Simulation of transport in laterally gated junctionless transistors fabricated by local anodization with an atomic force microscope;physica status solidi (a);2013-06-24
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