Dual dielectric tunnel barrier in silicon-rich silicon nitride charge-trap nonvolatile memory
Author:
Publisher
AIP Publishing
Subject
Physics and Astronomy (miscellaneous)
Link
http://aip.scitation.org/doi/pdf/10.1063/1.3521260
Reference12 articles.
1. Ultrashort SONOS Memories
2. A low voltage SONOS nonvolatile semiconductor memory technology
3. Gate layout and bonding pad structure of a RF n-MOSFET for low noise performance
4. $V_{\rm th}$ Control by Complementary Hot-Carrier Injection for SONOS Multi-Level Cell Flash Memory
5. Layered tunnel barriers for nonvolatile memory devices
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