Influence of impurity concentration in Ge sources on electrical properties of Ge/Si hetero-junction tunneling field-effect transistors
Author:
Affiliation:
1. Department of Electrical Engineering and Information Systems, University of Tokyo, 2-11-16 Yayoi, Bunkyo-ku, Tokyo 113-8656, Japan
Funder
Core Research for Evolutional Science and Technology
Publisher
AIP Publishing
Subject
Physics and Astronomy (miscellaneous)
Link
http://aip.scitation.org/doi/pdf/10.1063/1.5028529
Reference39 articles.
1. Complementary tunneling transistor for low power application
2. Low-Voltage Tunnel Transistors for Beyond CMOS Logic
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4. Further Insights in TFET Operation
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