Abstract
This paper analyses three innovative designs of comparators and those structures have better performance than the traditional comparator. The dynamic floating inverter amplifier improves energy efficiency by preventing full discharging and charging. The Dynamic Bias Latch-Type Comparator used a double-tails latch to decrease energy consumption. The charge-injection compensations comparator has better sensitivity and less noise by utilizing the feedback loop. Those methods have greatly increased voltage gain, energy efficiency, and gm/Id
Publisher
Darcy & Roy Press Co. Ltd.
Reference11 articles.
1. Bindra H S, Lokin C E, Schinkel D, Annema A J and Nauta B 2018 A 1.2-V dynamic bias latch-type comparator in 65-nm CMOS with 0.4-mV input noise IEEE J. Solid-State Circ. 53 1902-12
2. Tang X, Shen L, Kasap B, Yang X, Shi W, Mukherjee A, Pan D Z and Sun N 2020 An energy-efficient comparator with dynamic floating inverter amplifierIEEE J. Solid-State Circ. 55 1011-22
3. Palmisano G and Palumbo G 1996 High performance CMOS current comparator design IEEE Trans. Circ. Syst. 43 785-90
4. van Elzakker M, van Tuijl E, Geraedts P, Schinkel D, Klumperink E A M and Nauta B 2010 A 10-bit charge-redistribution ADC consuming 1.9 μW at 1 MS/s IEEE J. Solid-State Circ. 45 1007–15
5. Tang X, Kasap B, Shen L, Yang X, Shi W and Sun N An energy- efficient comparator with dynamic floating inverter pre-amplifier Proceeding of the IEEE Symp. VLSI Circuits (VLSI) (Piscataway: IEEE) pp 140–1