A concatenation scheme of LDPC codes and source codes for flash memories

Author:

Huang Qin,Pan Song,Zhang Mu,Wang Zulin

Abstract

Abstract Recently, low-density parity-check (LDPC) codes have been applied in flash memories to correct errors. However, as verified in this article, their performance degrades rapidly as the number of stuck cells increases. Thus, this paper presents a concatenation reliability scheme of LDPC codes and source codes, which aims to improve the performance of LDPC codes for flash memories with stuck cells. In this scheme, the locations of stuck cells is recorded by source codes in the write process such that erasures rather than wrong log-likelihood ratios on these cells are given in the read process. Then, LDPC codes correct these erasures and soft errors caused by cell-to-cell interferences. The analyses of channel capacity and compression rates of source codes with side information show that the memory cost of the proposed scheme is moderately low. Simulation results verify that the proposed scheme outperforms the traditional scheme with only LDPC codes.

Publisher

Springer Science and Business Media LLC

Reference16 articles.

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1. High-Throughput Hardware Architecture for LDPC Decoders;Signals and Communication Technology;2017-10-18

2. Mitigating Stuck Cell Failures in MLC NAND Flash Memory via Inferred Erasure Decoding;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-08

3. Low Complexity Approach for High Throughput Belief-Propagation based Decoding of LDPC Codes;Advances in Electrical and Computer Engineering;2013

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