Increasing formalization of tasks of verification of topology and electrical diagram for CAD-CAM design systems

Author:

Poluektov Aleksandr1,Zolnikov Konstantin2,Achkasov A.1,Chevychelov Yu.1

Affiliation:

1. Voronezh State University of Forestry and Technologies named after G.F. Morozov

2. AO "Nauchno-issledovatel'skiy institut elektronnoy tehniki"

Abstract

The article discusses the study of methods for checking the conformity of the topology and electrical circuit in electronic devices. The authors present a new approach to the analysis and verification of topological structure taking into account electrical characteristics, which leads to increased formalization of problems and provides better optimization of interaction between a person and a computer CAD system. The study includes an analysis of modern methods and tools used in the electronic device design process, and also proposes innovative approaches to ensure consistency between topology and electrical functionality. LVS verification of the project using Caliber, xRC extraction of the project, physical verification of the project using CAD software Cadence Physical Verification System (PVS), LVS verification of the project using PVS are performed. Presents a detailed analysis of the integrated circuit verification process performed using modern CAD tools. The work examines the key stages of verification, including LVS verification of the project using the Caliber tool, xRC extraction of the project, as well as physical verification of the project using the Cadence Physical Verification System (PVS). Particular attention is paid to LVS checks, which are an important design step to ensure compliance with the topology and electrical design. The features of using Caliber to perform LVS checks are discussed, as well as the xRC extraction process to extract parameters of resistors and capacitors. For physical verification of the project, the capabilities of Cadence PVS were used, which provides analysis of compliance of the physical implementation of the circuit with the specified rules. The results obtained and the experience presented in the article can be useful for engineers and researchers involved in the design of integrated circuits, as well as for those interested in the application of modern CAD tools in the field of verification and validation of electronic devices.

Publisher

Infra-M Academic Publishing House

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