High-Level Synthesis through metaheuristics and LUTs optimization in FPGA devices-Reference-Cited by-同舟云学术

High-Level Synthesis through metaheuristics and LUTs optimization in FPGA devices

Published:2017-05-16 Issue:2 Volume:30 Page:151-168
ISSN:1875-8452
Container-title:AI Communications
language:
Short-container-title:AIC

Author:

Reyes Fernández de Bulnes Darian¹,Dibene Simental Juan Carlos¹,Maldonado Yazmin¹,Trujillo Leonardo¹

Affiliation:

1. Instituto Tecnológico de Tijuana, Tijuana, B.C., Mexico. E-mails: darian.reyes@tectijuana.edu.mx, juan.carlos.dibene.simental@gmail.com, yaz.maldonado@tectijuana.edu.mx, leonardo.trujillo@tectijuana.edu.mx

Publisher

IOS Press

Subject

Artificial Intelligence

Reference25 articles.

1. M.C. Bhuvaneswari, Application of Evolutionary Algorithms for Multi-Objective Optimization in VLSI and Embedded Systems, 1th edn, Springer India, 2015.

2. PISA — A Platform and Programming Language Independent Interface for Search Algorithms

3. D. Chen and J. Cong, DAOMap: A depth-optimal area optimization mapping algorithm for FPGA designs, in: Proc. IEEE Int. Conf. Comput, 2004, pp. 752–759.

4. J. Cong and Y.-Y. Hwang, Simultaneous depth and area minimization in LUT-based FGPA mapping, in: Proc. ACM Int. Symp. FPGAs, 1995, pp. 68–74.

5. J. Cong, J. Peck and Y. Ding, RASP: A general logic synthesis system for SRAM-based FPGAs, in: Proc. ACM Int. Symp. FPGAs, 1996, pp. 137–143.

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