Abstract
AbstractThe projected speckle-based three-dimensional digital image correlation method (3D-DIC) is being increasingly used in the reliability measurement of microelectronic packaging structures because of its noninvasive nature, high precision, and low cost. However, during the measurement of the thermal reliability of packaging structures, the thermal airflow generated by heating introduces distortions in the images captured by the DIC measurement system, impacting the accuracy and reliability of noncontact measurements. To address this challenge, a thermal airflow distortion correction model based on the transformer attention mechanism is proposed specifically for the measurement of thermal warpage in microelectronic packaging structures. This model avoids the oversmoothing issue associated with convolutional neural networks and the lack of physical constraints in generative adversarial networks, ensuring the precision of grayscale gradient changes in speckle patterns and minimizing adverse effects on DIC calculation accuracy. By inputting the distorted images captured by the DIC measurement system into the network, corrected images are obtained for 3D-DIC calculations, thus allowing the thermal warpage measurement results of the sample to be acquired. Through experiments measuring topography with customized step block specimens, the effectiveness of the proposed method in improving warpage measurement accuracy is confirmed; this is particularly true when captured images are affected by thermal airflow at 140 °C and 160 °C, temperatures commonly encountered in thermal reliability testing of packaging structures. The method successfully reduces the standard deviation from 9.829 to 5.943 µm and from 12.318 to 6.418 µm, respectively. The results demonstrate the substantial practical value of this method for measuring thermal warpage in microelectronic packaging structures.
Funder
National Natural Science Foundation of China
Publisher
Springer Science and Business Media LLC
Reference35 articles.
1. Cheng, HC, Tai, LC & Liu, YC. Theoretical and experimental investigation of warpage evolution of flip chip package on packaging during fabrication. Materials 14, https://doi.org/10.3390/ma14174816 (2021).
2. Lau, C. S., Khor, C. Y., Soares, D., Teixeira, J. C. & Abdullah, M. Z. Thermo- mechanical challenges of reflowed lead-free solder joints in surface mount components: a review. Solder. Surf. Mt. Technol. 28, 41–62 (2016).
3. Niu, Y. L. et al. A comprehensive solution for electronic packages’ reliability assessment with digital image correlation (DIC) method. Microelectron. Reliab. 87, 81–88 (2018).
4. Kim, H., Hwang, J. Y., Kim, S. E., Joo, Y. C. & Jang, H. Thermomechanical challenges of 2.5-D packaging: a review of warpage and interconnect reliability. IEEE Trans. Comp. Pack. Manuf. Technol. 13, 1624–1641 (2023).
5. Shao, S et al. Design guideline on board-level thermomechanical reliability of 2.5D package. Microelectron. Reliab. 111, https://doi.org/10.1016/j.microrel.2020.113701 (2020).