The Effects of Contamination on Semiconductor Manufacturing Yield

Abstract

The challenges associated with controlling particulate and chemical contamination to achieve high semiconductor device yields are demonstrated with data showing the influence of cleanroom air, semiconductor processes and tools, gases, chemicals, and Dl water. Because typical film thicknesses are much smaller than pattern feature sizes, defects that are as small as one hundredth of the lithographic dimension must be controlled. Scaling device dimensions by a factor of 1/3 to 1/2 will require almost a factor of 10 reduction of particulate levels in order to maintain the prescaling yield. To achieve a 78 percent yield (0.25 defects/cm2) in a typical submicron process containing 250 process steps, each step must contribute no more than 0.001 killer defects/cm2 on average. Storage of wafers for 1 hr in a Class 1 vertical laminar flow cleanroom is sufficient to reach this level. Considerably more defects are introduced in other process steps involving automated tools or chemical/gas exposure. As device dimensions are reduced, the contamination associated with liquids will become relatively more important than that from gases and cleanroom air.