Cobalt Silicidation on Sub 100nm Hole Patterned Vertical Diode Formed by Silicon Epitaxial Growth and Its Electrical Properties

Abstract

ABSTRACTSelf-aligned Cobalt silicide as ohmic contact layer on sub 100 nm hole patterned Si vertical diode formed by silicon epitaxial growth (SEG) is investigated and silicon epitaxial growth of higher than 4000 Å thickness and good crystalinity for PN diode has been successfully developed. Also, electrical isolation of 100 nm pitch size between diode and diode, and removal of unreacted Co/Ti/TiN layer have been realized by dip-out process without CMP simultaneously. Through the mechanism of void formation due to the variation of Si consumption rate during silicidation at limited hole pattern dimension, critical Co and Capping Ti thickness are investigated as various hole dimensions (80∼120 nm), and then with p+ type dopant species (49BF2, 11B). The ratio of Co thickness to hole dimension demonstrates void free cobalt silcidation on various pattern sizes of silicon epitaxial growth. Silicon epitaxial growing PN diodes including void free CoSi2 show excellent electrical performance, especially lower than 10 pA reverse off leakage current.