Review and Comparison of Clock Jitter Noise Reduction Techniques for Lowpass Continuous-Time Delta-Sigma Modulators

Author:

Chang Hairong,Tang Hua

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering

Reference42 articles.

1. Delta-Sigma Data Converters: Theory, Design, and Simulation;Norsworthy,1996

2. Excess loop delay in continuous-time delta-sigma modulators

3. A 14-bit Continuous-Time Delta-Sigma A/D Modulator with 2.5 MHz Signal Bandwidth;Li;IEEE J. Solid State Circuits,2007

4. A Continuous-Time>tex<$Sigma Delta $>/tex<Modulator With 88-dB Dynamic Range and 1.1-MHz Signal Bandwidth

5. Continuous-Time Delta-Sigma Modulators for High-speed A/D Conversions: Theory, Practice and Fundamental Performance Limits;Cherry,2000

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Noise Reduction in Spur Gear Systems;Entropy;2020-11-16

2. System level design of third order Continuous-Time Sigma-Delta Modulator;2020 17th International Multi-Conference on Systems, Signals & Devices (SSD);2020-07-20

3. Jitter Suppression Techniques for High-Speed Sample-and-Hold Circuits;IEEE Transactions on Circuits and Systems I: Regular Papers;2020-01

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