A Buried Thermal Rail (BTR) Technology to Improve Electrothermal Characteristics of Complementary Field-Effect Transistor (CFET)

Author:

Pan Zhecheng1,Liu Tao1ORCID,Yang Jingwen1,Chen Kun12ORCID,Xu Saisheng12,Wu Chunlei12,Xu Min12,Zhang David Wei12

Affiliation:

1. School of Microelectronics, Fudan University, Shanghai 200433, China

2. Shanghai Integrated Circuit Manufacturing Innovation Center Co., Ltd., Shanghai 201203, China

Abstract

The complementary field-effect transistor (CFET) with N-type FET (NFET) stacked on P-type FET (PFET) is a promising device structure based on gate-all-around FET (GAAFET). Because of the high-density stacked structure, the self-heating effect (SHE) becomes more and more severe. Buried thermal rail (BTR) technology on top of the buried power rail (BPR) process is proposed to improve heat dissipation. Through a systematical 3D Technology Computer Aided Design (TCAD) simulation, compared to traditional CFET and CFET with BPR only, the thermal resistance (Rth) of CFET can be significantly reduced with BTR technology, while the drive capability is also improved. Furthermore, based on the proposed BTR technology, different power delivery structures of top-VDD–top-VSS (TDTS), bottom-VDD–bottom-VSS (BDBS), and bottom-VDD–top-VSS (BDTS) were investigated in terms of electrothermal and parasitic characteristics. The Rth of the BTR-BDTS structure is decreased by 5% for NFET and 9% for PFET, and the Ion is increased by 2% for NFET and 7% for PFET.

Funder

Platform for the Development of Next-Generation Integrated Circuit Technology

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Mechanical Engineering,Control and Systems Engineering

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