Author:
Elangovan Surya,Cheng Stone,Chang Edward Yi
Abstract
We present a detailed study of dynamic switching instability and static reliability of a Gallium Nitride (GaN) Metal-Insulator-Semiconductor High-Electron-Mobility-Transistor (MIS-HEMT) based cascode switch under off-state (negative bias) Gate bias stress (VGS, OFF). We have investigated drain channel current (IDS, Max) collapse/degradation and turn-on and rise-time (tR) delay, on-state resistance (RDS-ON) and maximum transconductance (Gm, max) degradation and threshold voltage (VTH) shift for pulsed and prolonged off-state gate bias stress VGS, OFF. We have found that as stress voltage magnitude and stress duration increases, similarly IDS, Max and RDS-ON degradation, VTH shift and turn-on/rise time (tR) delay, and Gm, max degradation increases. In a pulsed off-state VGS, OFF stress experiment, the device instabilities and degradation with electron trapping effects are studied through two regimes of stress voltages. Under low stress, VTH shift, IDS collapse, RDS-ON degradation has very minimal changes, which is a result of a recoverable surface state trapping effect. For high-stress voltages, there is an increased and permanent VTH shift and high IDS, Max and RDS-ON degradation in pulsed VGS, Stress and increased rise-time and turn-on delay. In addition to this, a positive VTH shift and Gm, max degradation were observed in prolonged stress experiments for selected high-stress voltages, which is consistent with interface state generation. These findings provide a path to understand the failure mechanisms under room temperature and also to accelerate the developments of emerging GaN cascode technologies.
Subject
Energy (miscellaneous),Energy Engineering and Power Technology,Renewable Energy, Sustainability and the Environment,Electrical and Electronic Engineering,Control and Optimization,Engineering (miscellaneous)
Cited by
18 articles.
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