A Fully Integrated High Efficiency 2.4 GHz CMOS Power Amplifier with Mode Switching Scheme for WLAN Applications
-
Published:2023-06-22
Issue:13
Volume:13
Page:7410
-
ISSN:2076-3417
-
Container-title:Applied Sciences
-
language:en
-
Short-container-title:Applied Sciences
Author:
Shen Haoyu12, Mo Taishan3, Wu Bin3
Affiliation:
1. The Intelligent Manufacturing Electronics R&D Center, Institute of Microelectronics of the Chinese Academy of Sciences, Beijing 100029, China 2. School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100049, China 3. Zhejiang CASEMIC Electronics Technology Co., Ltd., Hangzhou 310051, China
Abstract
A 3.3 V mode-switching RF CMOS power amplifier (PA) for WLAN applications is presented, which is integrated into a 55-nm bulk CMOS process. The proposed PA offers both static control and dynamic power control, allowing it to operate efficiently in both low-power and high-power modes. The pure low-power mode is achieved by reducing power cells, which are also used for linearization in high power mode. The low-power mode is achieved by reducing the number of power cells which are also used for linearization in the high-power mode. In the dynamic power control mode, the total AM–AM and AM–PM distortion is effectively compensated for by dynamically controlling the number of power cells and adjusting the matching input. The proposed PA achieves an output P1dB of 27.6 dBm with a PAE of 32.7% and an output P1dB of 17.7 dBm with a PAE of 10% in high-power and low-power modes, respectively. It is measured with an 802.11 n 64-quadrature-amplitude-modulation (MCS7) signal and shows a maximum average power of 19 dBm under an error-vector-magnitude (EVM) of −27 dB.
Subject
Fluid Flow and Transfer Processes,Computer Science Applications,Process Chemistry and Technology,General Engineering,Instrumentation,General Materials Science
Reference44 articles.
1. Lee, C.P., Behzad, A., Marholev, B., Magoon, V., Bhatti, I., Li, D., Bothra, S., Afsahi, A., Ojo, D., and Roufoogaran, R. (2010, January 7–11). 25.3 A MultiStandard, Multiband SoC with Integrated BT, FM, WLAN Radios and Integrated Power Amplifier. Proceedings of the 2010 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA. 2. Kumar, R., Krishnaswamy, T., Rajendran, G., Sahu, D., Sivadas, A., Nandigam, M., Ganeshan, S., Datla, S., Kudari, A., and Bhasin, H. (2013, January 17–21). 19.1 A Fully Integrated 2 × 2 b/g and 1 × 2 a-Band MIMO WLAN SoC in 45 nm CMOS for Multi-Radio IC. Proceedings of the 2013 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA. 3. Chen, T.M., Chan, W.C., Lin, C.C., Hsu, J.L., Li, W.K., Wu, P.A., Huang, Y.L., Huang, Y.C., Tsai, T., and Chang, P.Y. (2014, January 1–3). A 2 × 2 MIMO 802.11 abgn/ac WLAN SoC with integrated T/R switch and on-chip PA delivering VHT80 256QAM 17.5 dBm in 55 nm CMOS. Proceedings of the 2014 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Tampa, FL, USA. 4. Chen, T.M., Lu, Y., Chen, P.N., Chang, Y.H., Liu, M.C., Chang, P.Y., Liang, C.J., Chen, Y.C., Lu, H.L., and Ding, J.Y. (2017, January 5–9). 7.1 An 802.11 ac dual-band reconfigurable transceiver supporting up to four VHT80 spatial streams with 116fs rms-jitter frequency synthesizer and integrated LNA/PA delivering 256QAM 19 dBm per stream achieving 1.733 Gb/s PHY rate. Proceedings of the 2017 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA. 5. Lu, E., Li, W.K., Deng, Z., Rostami, E., Wu, P.A., Chang, K.M., Chuang, Y.C., Lai, C.M., Chen, Y.C., and Peng, T.H. (2020, January 16–20). 10.4 A 4 × 4 Dual-Band Dual-Concurrent WiFi 802.11 ax Transceiver with Integrated LNA, PA and T/R Switch Achieving +20 dBm 1024-QAM MCS11 P out and− 43dB EVM Floor in 55nm CMOS. Proceedings of the 2020 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
|
|