A RRAM-Based True Random Number Generator with 2T1R Architecture for Hardware Security Applications
-
Published:2023-06-08
Issue:6
Volume:14
Page:1213
-
ISSN:2072-666X
-
Container-title:Micromachines
-
language:en
-
Short-container-title:Micromachines
Author:
Peng Bo1, Wu Qiqiao2, Wang Zhongqiang1, Yang Jianguo34ORCID
Affiliation:
1. Key Laboratory of UV Light-Emitting Materials and Technology of Ministry of Education, Northeast Normal University, Changchun 130024, China 2. School of Microelectronics, University of Science and Technology of China, Hefei 230026, China 3. Key Laboratory of Microelectronic Devices Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing 100029, China 4. Research Center for Intelligent Computing Hardware, Zhejiang Lab, Hangzhou 311121, China
Abstract
Resistance random access memory (RRAM) based true random number generator (TRNG) has great potential to be applied to hardware security owing to its intrinsic switching variability. Especially the high resistance state (HRS) variation is usually taken as the entropy source of RRAM-based TRNG. However, the small HRS variation of RRAM may be introduced owing to fabrication process fluctuations, which may lead to error bits and be vulnerable to noise interference. In this work, we propose an RRAM-based TRNG with a 2T1R architecture scheme, which can effectively distinguish the resistance values of HRS with an accuracy of 1.5 kΩ. As a result, the error bits can be corrected to a certain extent while the noise is suppressed. Finally, a 2T1R RRAM-based TRNG macro is simulated and verified using the 28 nm CMOS process, which suggests its potential for hardware security applications.
Funder
Major Scientific Research Project of Zhejiang Lab
Subject
Electrical and Electronic Engineering,Mechanical Engineering,Control and Systems Engineering
Reference24 articles.
1. Yang, J., Xu, J., Wang, B., Xue, X., Huang, R., Zhou, Q., Wu, J., and Lin, Y. (2015, January 3–6). A Low Cost and High Reliability True Random Number Generator. Proceedings of the 2015 IEEE 11th International Conference on ASIC, Chengdu, China. 2. Yang, K., Fick, D., Henry, M.B., Lee, Y., Blaauw, D., and Sylvester, D. (2014, January 9–13). A 23Mb/s 23pJ/b fully synthesized true-random-number generator in 28nm and 65nm CMOS. Proceedings of the 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers, San Francisco, CA, USA. 3. A Contact-Resistive Random-Access-Memory-Based True Random Number Generator;Huang;IEEE Electron Device Lett.,2012 4. Wei, Z., Katoh, Y., Ogasahara, S., Yoshimoto, Y., Kawai, K., Ikeda, Y., Eriguchi, K., Ohmori, K., and Yoneda, S. (2016, January 3–7). True random number generator using current difference based on a fractional stochastic model in 40-nm embedded ReRAM. Proceedings of the 2016 IEEE International Electron Devices Meeting, San Francisco, CA, USA. 5. Brederlow, R., Prakash, R., Paulus, C., and Thewes, R. (2006, January 6–9). A low-power true random number generator using random telegraph noise of single oxide-traps. Proceedings of the 2006 IEEE International Solid State Circuits Conference—Digest of Technical Papers, San Francisco, CA, USA.
|
|