Abstract
In this paper, we present the design of an analog Automatic Gain Control with a small silicon area and reduced power consumption using a 0.5 μ m process. The design uses a classical approach implementing the AGC system with simple blocks, such as: peak detector, difference amplifier, four-quadrant multiplier, and inversor amplifier. Those blocks were realized by using a modified Miller type OPAMP, which allows indirect compensation, while the peak detector uses a MOS diode. The AGC design is simulated using the Tanner-Eda environment and Berkeley models BSIM49 of the On-Semiconductor C5 process, and it was fabricated through the MOSIS prototyping service. The AGC system has an operation frequency of around 1 kHz, covering the range of biomedical applications, power consumption of 200 μ W, and the design occupies a silicon area of approximately 508.8 μ m × 317.7 μ m. According to the characteristics obtained at the experimental level (attack and release time), this AGC can be applied to hearing aid systems.
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering
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