Abstract
This paper presents a compact balun with a common inductor design. The design used Wilkinson-type balun topology with modified lumped transmission lines and a common inductor to realize circuit size reduction on a lossy CMOS process. Measurements of the prototype chip had a reflection coefficient below 17.8 dB at all ports, an insertion loss of 1.98 dB, and an isolation of 16.8 dB. The chip size was only 0.025λ0 × 0.034λ0.
Funder
Memorandum of Understanding of King Mongkut’s Institute of Technology Ladkrabang
National Taipei University of Technology-King Mongkut’s Institute of Technology Ladkrabang Joint Research Program
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering
Cited by
2 articles.
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