Ultralow Voltage FinFET- Versus TFET-Based STT-MRAM Cells for IoT Applications

Author:

Garzón EstebanORCID,Lanuzza MarcoORCID,Taco RamiroORCID,Strangio SebastianoORCID

Abstract

Spin-transfer torque magnetic tunnel junction (STT-MTJ) based on double-barrier magnetic tunnel junction (DMTJ) has shown promising characteristics to define low-power non-volatile memories. This, along with the combination of tunnel FET (TFET) technology, could enable the design of ultralow-power/ultralow-energy STT magnetic RAMs (STT-MRAMs) for future Internet of Things (IoT) applications. This paper presents the comparison between FinFET- and TFET-based STT-MRAM bitcells operating at ultralow voltages. Our study is performed at the bitcell level by considering a DMTJ with two reference layers and exploiting either FinFET or TFET devices as cell selectors. Although ultralow-voltage operation occurs at the expense of reduced reading voltage sensing margins, simulations results show that TFET-based solutions are more resilient to process variations and can operate at ultralow voltages (<0.5 V), while showing energy savings of 50% and faster write switching of 60%.

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering

Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Voltage-Divider-Based Binary and Ternary Content-Addressable Memory (CAM) Exploiting Double-Barrier Magnetic Tunnel Junction;2023 IEEE Seventh Ecuador Technical Chapters Meeting (ECTM);2023-10-10

2. Write Driver for Low Power Consumption in Magnetic Tunnel Junction (MTJ) Circuits;2023 IEEE 12th International Conference on Communication Systems and Network Technologies (CSNT);2023-04-08

3. First-principles study of enhancement of perpendicular magnetic anisotropy obtained by inserting an ultrathin LiF layer at an Fe/MgO interface;Journal of Magnetism and Magnetic Materials;2023-04

4. STT-MRAM Technology For Energy-Efficient Cryogenic Memory Applications;2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS);2023-02-27

5. Performance Benchmarking of FinFET- and TFET-Based STT-MRAM Bitcells Operating at Ultra-Low Voltages;2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS);2023-02-27

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