Novel Minimalist Hardware Architecture for Long Sync Word Frame Synchronization and Payload Capture

Abstract

Sync word-based frame synchronization is an established method of frame synchronization that is employed in many low-resource applications because of its simplicity, and it involves the attachment of sync words (digital binary sequences) to the frames, which are then used for detection. Despite its simplicity, the method is underutilized today because there is no available hardware scheme that can perform correlation-based sync word frame synchronization with long sync words (>80 bits) efficiently. For this reason, the sync word methods that are used typically employ sync words of shorter lengths (<50 bits) with limited accuracy. This article introduces a highly modifiable, minimalist hardware architecture that performs correlation-based sync word frame synchronization using long sync words with evident accuracy gains over existing methods. As a bonus, the architecture not only detects the frame but also captures its payload regardless of size. Its low complexity allows for its deployment at a low cost in terms of hardware resources and power while providing high bit rates. Its flexibility is demonstrated by using a low-cost FPGA for implementation.