Abstract
This paper reports a “single-transistor” Class-F−1 power amplifier (PA) in 65 nm CMOS, which operates at the microwave center frequency of 6 GHz. The PA is loaded with a Class-F−1 harmonic control network, employing a new “parasitic-aware” topology deduced using a novel iterative algorithm. A dual-purpose output matching network is designed, which not only serves the purpose of output impedance matching, but also reinforces the harmonic control of the Class-F−1 harmonic network. This proposed PA yields a peak power-added efficiency (PAE) of 47.8%, which is one of the highest when compared to previously reported integrated microwave/millimeter-wave PAs in CMOS and SiGe technologies. The amplifier shows a saturated output power of 14.4 dBm along with an overall gain of 13.8 dB.
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering