From Chip Size to Wafer-Scale Nanoporous Gold Reliable Fabrication Using Low Currents Electrochemical Etching

Abstract

We report a simple, scalable route to wafer-size processing for fabrication of tunable nanoporous gold (NPG) by the anodization process at low constant current in a solution of hydrofluoric acid and dimethylformamide. Microstructural, optical, and electrochemical investigations were employed for a systematic analysis of the sample porosity evolution while increasing the anodization duration, namely the small angle X-ray scattering (SAXS) technique and electrochemical impedance spectroscopy (EIS). Whereas the SAXS analysis practically completes the scanning electronic microscopy (SEM) investigations and provides data about the impact of the etching time on the nanoporous gold layers in terms of fractal dimension and average pore surface area, the EIS analysis was used to estimate the electroactive area, the associated roughness factor, as well as the heterogeneous electron transfer rate constant. The bridge between the analyses is made by the scanning electrochemical microscopy (SECM) survey, which practically correlates the surface morphology with the electrochemical activity. The results were correlated to endorse the control over the gold film nanostructuration process deposited directly on the substrate that can be further subjected to different technological processes, retaining its properties. The results show that the anodization duration influences the surface area, which subsequently modifies the properties of NPG, thus enabling tuning the samples for specific applications, either optical or chemical.