Affiliation:
1. Dr. B.R. Ambedkar National Institute of Technology Jalandhar India
2. Indian Institute of Technology Mandi India
3. Lendi Institute of Engineering and Technology Jonnada India
4. Indian Institute of Technology Delhi New Delhi India
Abstract
AbstractThis paper proposes a systematic approach to enhance the performance of a 21‐level asymmetrical multilevel inverter (MLI) with less power electronics switches and DC voltage sources. In the first step (Configuration 1), the voltage level is improved at the cost of DC‐link voltage utilization. In the second step (Configuration 2), the ratio of the DC‐link voltages is modified to improve the utilization of DC‐link voltage, with an insignificant reduction of voltage levels as compared to Configuration 1. Finally, another modification of the MLI configuration is proposed (Configuration 3), by incorporating an H‐bridge in place of a T‐type module for further improvement of DC source utilization and increasing the number of voltage levels. Thus, Configuration 3 improves the inverter's total standing voltage (TSV) and efficiency. To reduce the number of DC sources, the output voltage levels are obtained in Configuration 3 by adding and subtracting the input DC sources. Moreover, conducting switches are reduced to minimize conduction loss and maximize efficiency. The DS1103‐based digital controller is used to verify the performance of the proposed configurations, which are compared with the literature‐based MLI models.