A new seven‐level ANPC inverter structure with semiconductor device reduction-Reference-Cited by-同舟云学术

A new seven‐level ANPC inverter structure with semiconductor device reduction

Author:

Siddique Marif Daula¹^ORCID,Husain Mohammed Aslam²,Wasiq Mohammad³,Babu Thanikanti Sudhakar⁴,Mekhilef Saad⁵

Affiliation:

1. Energy Harvesting and Mechatronics Research Laboratory, Department of Mechanical Engineering Virginia Tech Blacksburg Virginia USA

2. Rajkiya Engineering College Uttar Pradesh India

3. Budapest University of Technology and Economics Budapest Hungary

4. Chaitanya Bharathi Institute of Technology (CBIT) India

5. School of Software and Electrical Engineering Swinburne University of Technology Melbourne Victoria Australia

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Link

Reference23 articles.

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Improved Dual Boost Mid-Point Clamped Five-Level Inverter Topology;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-06

3. A New Configurable SC-based MLI Topology with Lower Device Count;2023 Innovations in Power and Advanced Computing Technologies (i-PACT);2023-12-08