Design Technology of Stacked-Type Chain PRAM

Author:

Kato Sho1,Watanabe Shigeyoshi1

Affiliation:

1. Shonan Institute of Technology; Japan

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Networks and Communications,General Physics and Astronomy,Signal Processing

Reference22 articles.

1. A 0.1-um 1.8-V 256-Mb phase-change random access memory (PRAM) with 66-MHz synchronous burst-read operation;Kan;IEEE J Solid-State Circuits,2007

2. A 0.18-um 3.0-V 64-Mb nonvolatile phase transition random access memory (PRAM);Cho;IEEE J Solid-State Circuits,2005

3. PRAM era begins: Numonyx 1G products to come 2009

4. Sasago Y Phase-change memory driven by poly-Si MOS transistor with low cost and high-programming gigabyte-per-second throughput Symposium on VLSI tech. 96 97 2011

5. Takashima D High-density chain ferroelectric random-access memory (CFRAM) Symposium on VLSI Circuit. 83 84 1997

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