The Significance of an In Situ ALD Al2O3 Stacked Structure for p‐Type SnO TFT Performance and Monolithic All‐ALD‐Channel CMOS Inverter Applications

Author:

Kim Hye‐Mi1,Choi Su‐Hwan2,Lee Han Uk34,Cho Sung Beom3,Park Jin‐Seong1ORCID

Affiliation:

1. Division of Materials Science and Engineering Hanyang University 222 Wangsimni‐ro Seongdong‐gu Seoul 04763 Republic of Korea

2. Division of Nano‐Scale Semiconductor Engineering Hanyang University 222 Wangsimni‐ro Seongdong‐gu Seoul 04763 Republic of Korea

3. Department of Materials Science and Engineering Ajou University 206 Worldcup‐ro, Yeongtong‐gu Suwon 16499 Republic of Korea

4. Department of Energy Systems Research Ajou University 206 Worldcup‐ro, Yeongtong‐gu Suwon 16499 Republic of Korea

Abstract

AbstractTin monoxide (SnO) has been studied widely over the past several decades due to its promising theoretical p‐type performance. However, limited fabrication processes due to the low thermal and air stability of SnO have resulted in poor performance in thin‐film transistors (TFTs). Here, it is suggested that in situ atomic layer deposition (ALD) of an Al2O3 capping layer can improve the electrical performance in SnO TFTs. By adopting an in situ stacking process, which protects vulnerable SnO thin films from exposure to air and contamination, SnO exhibits enhanced crystallinity, electrical performance, and improved scaling limitation of channel thickness. Especially, in situ stacked Al2O3 on a 7 nm SnO TFT has an exceptionally low subthreshold swing (0.15 V decade−1), high on/off ratio (6.54 × 105), and reasonable mobility (1.14 cm2 V−1 s−1) while the bare SnO TFT is not activated. Computational thermodynamics such as chemical potential analysis, nucleation Gibbs free‐energy calculations, and various analytical techniques are used to reveal the origin of highly crystallized SnO formations via in situ deposition of Al2O3. Finally, state‐of‐the‐art all‐ALD‐channel complementary metal–oxide–semiconductor inverters using n‐type indium gallium zinc oxide and p‐type SnO TFTs are integrated, which exhibit a maximum voltage gain of 240 V V−1 and a noise margin of 89.3%.

Funder

National Research Foundation of Korea

Publisher

Wiley

Subject

Electronic, Optical and Magnetic Materials

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