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A new efficient SC integrator scheme for high-speed low-power applications

  • Published:2010-12-13 Issue:8 Volume:40 Page:733-744
  • ISSN:0098-9886
  • Container-title:International Journal of Circuit Theory and Applications
  • language:en
  • Short-container-title:Int. J. Circ. Theor. Appl.

Author:

Amoroso F. A.,Pugliese A.,Cappuccino G.

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Reference17 articles.

1. A systematic design flow for optimal capacitance assignment in switched-capacitor biquads;Tang;IEEE Transactions on Circuits and Systems I: Regular Papers,2008

2. An area-efficient switched-capacitor relaxation oscillator with digitally controlled frequency tunability;Ausin;International Journal of Circuit Theory and Applications,2009

3. Fourth-order cascaded ΣΔ modulator using tri-level quantization and bandpass noise shaping for broadband telecommunication applications;Chang;IEEE Transactions on Circuits and Systems I: Regular Papers,2008

4. A 100 MS/s 4 MHz bandwidth 70 dB SNR ΣΔ ADC in 90 nm CMOS;Fujimoto;IEEE Journal of Solid-State Circuits,2009

5. Double-sampled ΣΔ modulator with relaxed feedback timing;Shen;Electronics Letters,2009

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Time‐interleaved SAR ADC design with background calibration;International Journal of Circuit Theory and Applications;2020-01-15

2. A 7.5-μW 0.08-mm2single-ended SC delta-sigma ADC for acoustic sensor applications;International Journal of Circuit Theory and Applications;2015-09-16

3. Transistor size optimization in digital circuits using ant colony optimization for continuous domain;International Journal of Circuit Theory and Applications;2012-12-10
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