Inductor integration for internal parallel inverters

Abstract

SummaryIn addition to inheriting the merits of interleaved parallel inverters, the internal parallel structure (IPS) inverter has the advantages of reduced circulating current and lower switching loss. Currently, however, the suppression of circulating current and output current ripple individually results in an evident increase in the number and volume of inductors. In this work, an inductor integration scheme is developed to improve the IPS inverter. Two integrated inductors are developed for different application configurations. As a result, the circulating current and output current ripple are simultaneously suppressed by an integrated inductor, making each phase of the IPS inverter to be equipped with only one integrated inductor implemented by wounding two coils on one magnetic core. The feasibility of the inductor integration scheme for the IPS inverter is experimentally verified by a downscale prototype.