Optically Reconfigurable Complementary Logic Gates Enabled by Bipolar Photoresponse in Gallium Selenide Memtransistor

Author:

Rehman Shania1,Khan Muhammad Asghar2,Kim Honggyun1,Patil Harshada3,Aziz Jamal3,Kadam Kalyani D.4,Rehman Malik Abdul5,Rabeel Muhammad3,Hao Aize6,Khan Karim7,Kim Sungho1,Eom Jonghwa2,Kim Deok‐kee14,Khan Muhammad Farooq3ORCID

Affiliation:

1. Department of Semiconductor System Engineering Sejong University Seoul 05006 Republic of Korea

2. Department of Physics & Astronomy and Graphene Research Institute Sejong University Seoul 05006 Republic of Korea

3. Department of Electrical Engineering Sejong University Seoul 05006 Republic of Korea

4. Department of Convergence Engineering for Intelligent Drone Sejong University Seoul 05006 South Korea

5. Department of Chemical Engineering New Uzbekistan University Tashkent 100007 Uzbekistan

6. State Key Laboratory of Chemistry and Utilization of Carbon‐Based Energy Resources College of Chemistry Xinjiang University Urumqi Xinjiang 830017 P. R. China

7. School of Mechanical Engineering Dongguan University of Technology Dongguan 523808 P. R. China

Abstract

AbstractTo avoid the complexity of the circuit for in‐memory computing, simultaneous execution of multiple logic gates (OR, AND, NOR, and NAND) and memory behavior are demonstrated in a single device of oxygen plasma‐treated gallium selenide (GaSe) memtransistor. Resistive switching behavior with RON/ROFF ratio in the range of 104 to 106 is obtained depending on the channel length (150 to 1600 nm). Oxygen plasma treatment on GaSe film created shallow and deep‐level defect states, which exhibit carriers trapping/de‐trapping, that lead to negative and positive photoconductance at positive and negative gate voltages, respectively. This distinguishing feature of gate‐dependent transition of negative to positive photoconductance encourages the execution of four logic gates in the single memory device, which is elusive in conventional memtransistor. Additionally, it is feasible to reversibly switch between two logic gates by just adjusting the gate voltages, e.g., NAND/NOR and AND/NAND. All logic gates presented high stability. Additionally, memtransistor array (1×8) is fabricated and programmed into binary bits representing ASCII (American Standard Code for Information Interchange) code for the uppercase letter “N”. This facile device configuration can provide the functionality of both logic and memory devices for emerging neuromorphic computing.

Publisher

Wiley

Subject

General Physics and Astronomy,General Engineering,Biochemistry, Genetics and Molecular Biology (miscellaneous),General Materials Science,General Chemical Engineering,Medicine (miscellaneous)

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