Acceleration with long vector architectures: Implementation and evaluation of the FFT kernel on NEC SX‐Aurora and RISC‐V vector extension

Author:

Vizcaino Pablo1ORCID,Mantovani Filippo1ORCID,Ferrer Roger1ORCID,Labarta Jesus12ORCID

Affiliation:

1. Barcelona Supercomputing Center Barcelona Spain

2. Universitat Politècnica de Catalunya Barcelona Spain

Publisher

Wiley

Subject

Computational Theory and Mathematics,Computer Networks and Communications,Computer Science Applications,Theoretical Computer Science,Software

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Co-designing ab initio electronic structure methods on a RISC-V vector architecture;Open Research Europe;2024-08-05

2. Graph Computing on Long Vector Architectures (Yes, It Works!);2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27

3. Design and Implementation of a Compiler Supporting RISC-V Custom Cryptographic and Vector Instructions;Proceedings of the 7th International Conference on Computer Science and Application Engineering;2023-10-17

4. Software Development Vehicles to Enable Extended and Early Co-design: A RISC-V and HPC Case of Study;Lecture Notes in Computer Science;2023

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