Design, analysis, and implementation of a phase‐shift controlled cascaded H‐bridge and anti‐interleaved zeta converter‐based E‐bike battery charging circuitry

Author:

Raja Chandrasekhar Puranam1,G Arunkumar1ORCID

Affiliation:

1. Department of Energy and Power Electronics, School of Electrical Engineering Vellore Institute of Technology Vellore India

Abstract

AbstractThe rapid extinction of the fossil fuels across the globe has led to the technological advancements in the field of renewable energy sector and the electric vehicular technology. In order to match the paradigm shift in the energy sector and the technology, the battery charging circuitry of electric vehicle (EV) led to the revolutionary changes in the field of power electronics. Accordingly, various conventional topologies of DC‐DC converters were evolved. But there are a few drawbacks such as bulkiness, nonmultiple ports, and less control over the output current ripple. This work proposes a DC‐DC converter which is a hybrid combination of the full‐bridge converter and the zeta converter. The current and the voltage reversals at the high‐frequency transformer (HFT) terminals are made steady by anti‐interleaving the zeta converters on the secondary side. The control pulses of the full‐bridge converter are phase‐shifted to have the tight grip over the output. The modes of operation of the proposed DC‐DC converter has have presented. The calculation of the energy, current, and the voltage for the active and the passive components of the proposed converter has been provided. The proposed system is simulated, and the plots of the voltages and currents of different components of the converter are presented. The converter prototype has been developed to charge a 36 V lithium‐ion battery, and the effect of the phase shift on input current can be seen from the exhaustive results. The comparison of the calculated and simulated currents and voltages has been graphically illustrated. The proposed converter provides a novel converter topology which includes better output control with phase shift and reduced size of memory elements due to high‐frequency switching.

Funder

VIT University

Publisher

Wiley

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