1. New ultra high density EPROM and flash EEPROM with NAND structure cell,;Masuoka;Electron Devices Meeting, 1987 International,1987
2. S. Aritome
3. Jung , S.-M. Jang , J. Cho , W. Cho , H. Jeong , J. Chang , Y. Kim , J. Rah , Y. Son , Y. Park , J. Song , M.-S. Kim , K.-H. Lim , J.-S. Kim , K. Electron Devices Meeting, 2006. IEDM ’06. International 1 4
4. Park , K.-T. Kim , D. Hwang , S. Kang , M. Cho , H. Jeong , Y. Seo , Y.-l. Jang , J. Kim , H.-S. Jung , S.-M. Lee , Y.-T. Kim , C. Lee , W.-S. Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
5. A fully performance compatible 45 nm 4-gigabit three dimensional double-stacked multi-level NAND flash memory with shared bit-line structure,;Park;Solid-State Circuits, IEEE Journal of,2009