High level modeling of Dynamic Reconfigurable FPGAs
Author:
Affiliation:
1. INRIA Lille Nord Europe, Laboratoire d'Informatique Fondamentale de Lille (LIFL), Centre national de la recherche scientifique (CNRS), University of Lille, 59650 Lille, France
Abstract
Publisher
Hindawi Limited
Subject
Hardware and Architecture
Link
http://downloads.hindawi.com/journals/ijrc/2009/408605.pdf
Reference4 articles.
1. Model transformation: the heart and soul of model-driven software development
2. Safe design of high-performance embedded systems in an MDE framework
3. A Flexible System Level Design Methodology Targeting Run-Time Reconfigurable FPGAs
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