Influence of BJT Transit Frequency Limit Relation
to MOSFET Parameters on the Switching Speed
of BiCMOS Digital Circuits
-
Published:1999-01-01
Issue:2
Volume:9
Page:203-211
-
ISSN:1065-514X
-
Container-title:VLSI Design
-
language:en
-
Short-container-title:VLSI Design
Affiliation:
1. Department of Electrical and Computer Engineering, Louisiana State University, Baton Rouge 70803-5901, LA, USA
Abstract
The use is made of the BJT transit frequency limit (fTL) dependence on the MOSFET
parameters (L, Vth) to design BiCMOS digital circuits. The fTL relation is used in
conjunction with the established BiCMOS gate delay models. It is shown that the
minimum delay BiCMOS circuits driving the large capacitive load, can be designed at
the transit frequency limit with the reduced BJT AREA factor. The time delay
calculations are presented for a typical BiCMOS circuit and comparison is made with
the results simulated using SPICE.
Publisher
Hindawi Limited
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Hardware and Architecture