ULEEN: A Novel Architecture for Ultra-low-energy Edge Neural Networks

Author:

Susskind Zachary1ORCID,Arora Aman1ORCID,Miranda Igor D. S.2ORCID,Bacellar Alan T. L.3ORCID,Villon Luis A. Q.3ORCID,Katopodis Rafael F.3ORCID,de Araújo Leandro S.4ORCID,Dutra Diego L. C.3ORCID,Lima Priscila M. V.3ORCID,França Felipe M. G.5ORCID,Breternitz Jr. Mauricio6ORCID,John Lizy K.1ORCID

Affiliation:

1. The University of Texas at Austin, USA

2. Federal University of Recôncavo da Bahia, Brazil

3. Federal University of Rio de Janeiro, Brazil

4. Universidade Federal Fluminense, Brazil

5. Instituto de Telecomunicações, Portugal and Federal University of Rio de Janeiro, Brazil

6. ISCTE–Instituto Universitario de Lisboa, Portugal

Abstract

‘‘Extreme edge” 1 devices, such as smart sensors, are a uniquely challenging environment for the deployment of machine learning. The tiny energy budgets of these devices lie beyond what is feasible for conventional deep neural networks, particularly in high-throughput scenarios, requiring us to rethink how we approach edge inference. In this work, we propose ULEEN, a model and FPGA-based accelerator architecture based on weightless neural networks (WNNs). WNNs eliminate energy-intensive arithmetic operations, instead using table lookups to perform computation, which makes them theoretically well-suited for edge inference. However, WNNs have historically suffered from poor accuracy and excessive memory usage. ULEEN incorporates algorithmic improvements and a novel training strategy inspired by binary neural networks (BNNs) to make significant strides in addressing these issues. We compare ULEEN against BNNs in software and hardware using the four MLPerf Tiny datasets and MNIST. Our FPGA implementations of ULEEN accomplish classification at 4.0–14.3 million inferences per second, improving area-normalized throughput by an average of 3.6× and steady-state energy efficiency by an average of 7.1× compared to the FPGA-based Xilinx FINN BNN inference platform. While ULEEN is not a universally applicable machine learning model, we demonstrate that it can be an excellent choice for certain applications in energy- and latency-critical edge environments.

Funder

Semiconductor Research Corporation (SRC) Tasks

National Science Foundation

CAPES and CNPq, Brazil

FCT/COMPETE/FEDER, FCT/CMU IT Project FLOYD

FCT/MCTES

ISTAR

Aim Health Portugal, through national funds and when applicable co-funded EU funds

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Information Systems,Software

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