1. Trustworthy Codesign by Verifiable Transformations;2024 IEEE International Test Conference in Asia (ITC-Asia);2024-08-18
2. Modular Hardware Design of Pipelined Circuits with Hazards;Proceedings of the ACM on Programming Languages;2024-06-20
3. ShakeFlow: Functional Hardware Description with Latency-Insensitive Interface Combinators;Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2;2023-01-27
4. Formalized High Level Synthesis with Applications to Cryptographic Hardware;Lecture Notes in Computer Science;2023
5. Verified Technology Mapping in an Agda DSL for Circuit Design;Proceedings of the 34th Symposium on Implementation and Application of Functional Languages;2022-08-31