Affiliation:
1. IRSA-INRIA, Campus de Beaulieu, 35042 Rennes Cedex, France
Abstract
This paper presents the techniques used for the compilation of the data-flow, synchronous language SIGNAL. The key feature of the compiler is that it performs formal calculus on systems of boolean equations. The originality of the implementation of the compiler lies in the use of a tree structure to solve the equations.
Publisher
Association for Computing Machinery (ACM)
Subject
Computer Graphics and Computer-Aided Design,Software
Reference21 articles.
1. Lecture Notes in Computer Science;Amagbegnon T.P.,1995
2. Using VHDL for Link to Synthesis Tools
3. Berry~ Special section on another look at real-time programming;Benveniste A.;Proceedings of the IEEE,1991
4. The synchronous approach to reactive and real-time systems
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