Author:
Kim Nam Sung,Flautner Krisztián,Blaauw David,Mudge Trevor
Cited by
24 articles.
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1. Task-Enabled Instruction Cache Partitioning Scheme for Embedded System;Proceedings of First International Conference on Smart System, Innovations and Computing;2018
2. A survey of architectural techniques for improving cache power efficiency;Sustainable Computing: Informatics and Systems;2014-03
3. Early wakeup: improving the drowsy cache performance;TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES;2014
4. Low-Power Design of Hybrid Instruction Cache Based on Branch Prediction and Drowsy Cache;The Proceedings of the Second International Conference on Communications, Signal Processing, and Systems;2013-10-24
5. Dynamic Last-Level Cache Allocation to Reduce Area and Power Overhead in Directory Coherence Protocols;Euro-Par 2012 Parallel Processing;2012