Affiliation:
1. Stanford University, Stanford, CA
2. NOVA-LINCS, NOVA University of Lisbon, Caparica, Portugal
Abstract
Transactional memory systems providing snapshot isolation enable concurrent access to shared data without incurring aborts on read-write conflicts. Reducing aborts is extremely relevant as it leads to higher concurrency, greater performance, and better predictability. Unfortunately, snapshot isolation does not provide serializability as it allows certain anomalies that can lead to subtle consistency violations. While some mechanisms have been proposed to verify the correctness of a program utilizing snapshot isolation transactions, it remains difficult to repair incorrect applications. To reduce the programmer’s burden in this case, we present a technique based on dynamic code and graph dependency analysis that automatically corrects existing snapshot isolation anomalies in transactional memory programs. Our evaluation shows that corrected applications retain the performance benefits characteristic of snapshot isolation over conventional transactional memory systems.
Publisher
Association for Computing Machinery (ACM)
Subject
Hardware and Architecture,Information Systems,Software
Cited by
12 articles.
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1. FPGA-Accelerated Optimistic Concurrency Control for Transactional Memory;Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture;2019-10-12
2. Simplifying Transactional Memory Support in C++;ACM Transactions on Architecture and Code Optimization;2019-09-30
3. Stretching the capacity of hardware transactional memory in IBM POWER architectures;Proceedings of the 24th Symposium on Principles and Practice of Parallel Programming;2019-02-16
4. On the Semantics of Snapshot Isolation;Lecture Notes in Computer Science;2019
5. On Parallel Snapshot Isolation and Release/Acquire Consistency;Programming Languages and Systems;2018