PREASC

Author:

Goli Mehran1,Drechsler Rolf1

Affiliation:

1. University of Bremen and DFKI, Bibliothekstraße, Bremen, Germany

Abstract

The increasing functionality of electronic systems due to the constant evolution of the market requirements makes the non-functional aspects of such systems (e.g., energy consumption, area overhead, or performance) a major concern in the design process. Approximate computing is a promising way to optimize these criteria by trading accuracy within acceptable limits. Since the cost of applying significant structural changes to a given design increases with the stage of development, the optimization solution needs to be incorporated into the design as early as possible. For the early design entry, modeling hardware at the Electronic System Level (ESL) using the SystemC language is nowadays widely used in the industry. To apply approximation techniques to optimize a given SystemC design, designers need to know which parts of the design can be approximated. However, identifying these parts is a crucial and non-trivial starting point of approximate computing, as the incorrect detection of even one critical part as resilient may result in an unacceptable output. This usually requires a significant programming effort by designers, especially when exploring the design space manually. In this article, we present PREASC, a fully automated framework to identify the resilience portions of a given SystemC design. PREASC is based on a combination of static and dynamic analysis methods along with regression analysis techniques (a fast machine learning method providing an accurate function estimation). Once the resilient portions are identified, an approximation degree analysis is performed to determine the maximum error rate that each resilient portion can tolerate. Subsequently, the maximum number of resilient portions that can be approximated at the same time are reported to designers at different granularity levels. The effectiveness of our approach is evaluated using several standard SystemC benchmarks from various domains.

Funder

SATiSFy

University of Bremen's graduate school SyDe

German Excellence Initiative

German Federal Ministry of Education and Research (BMBF) within the project SecRec

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. ANN-based Performance Estimation of Embedded Software for RISC-V Processors;2022 IEEE International Workshop on Rapid System Prototyping (RSP);2022-10-13

2. Towards Neural Hardware Search: Power Estimation of CNNs for GPGPUs with Dynamic Frequency Scaling;Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD;2022-09-12

3. Towards Neural Hardware Search: Power Estimation of CNNs for GPGPUs with Dynamic Frequency Scaling;2022 ACM/IEEE 4th Workshop on Machine Learning for CAD (MLCAD);2022-09-12

4. Performance Verification of Bayesian Network–Based Security Risk Management and Control System for Power Trading Institutions;Frontiers in Energy Research;2022-07-13

5. ML-based Power Estimation of Convolutional Neural Networks on GPGPUs;2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS);2022-04-06

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