PANORAMA

Author:

Wijerathne Dhananjaya1,Li Zhaoying1,Bandara Thilini Kaushalya1,Mitra Tulika1

Affiliation:

1. National University of Singapore

Publisher

ACM

Reference25 articles.

1. L. Liu , " A survey of coarse-grained reconfigurable architecture and design: Taxonomy, challenges, and applications," in CSUR'19 L. Liu et al., "A survey of coarse-grained reconfigurable architecture and design: Taxonomy, challenges, and applications," in CSUR'19

2. S. Friedman etal "SPR: an architecture-adaptive CGRA mapping tool " in FPGA'09 S. Friedman et al. "SPR: an architecture-adaptive CGRA mapping tool " in FPGA'09

3. J. Lee and T. E. Carlson , " Ultra-Fast CGRA scheduling to enable run time, programmable CGRAs," in DAC'21 J. Lee and T. E. Carlson, "Ultra-Fast CGRA scheduling to enable run time, programmable CGRAs," in DAC'21

4. M. Karunaratne , " HyCUBE: A CGRA with reconfigurable single-cycle multi-hop interconnect," in DAC'17 M. Karunaratne et al., "HyCUBE: A CGRA with reconfigurable single-cycle multi-hop interconnect," in DAC'17

5. L. Chen and T. Mitra , " Graph minor approach for application mapping on CGRAs," in TRETS'14 L. Chen and T. Mitra, "Graph minor approach for application mapping on CGRAs," in TRETS'14

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1. Coarse-grained reconfigurable architectures for radio baseband processing: A survey;Journal of Systems Architecture;2024-09

2. A 420 GOPS/W CGRA with a Configurable MAC and Dynamic Truncation;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

3. HierCGRA: A Novel Framework for Large-scale CGRA with Hierarchical Modeling and Automated Design Space Exploration;ACM Transactions on Reconfigurable Technology and Systems;2024-05-10

4. FDRA: A Framework for a Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism;ACM Transactions on Reconfigurable Technology and Systems;2024-01-27

5. Flip : Data-centric Edge CGRA Accelerator;ACM Transactions on Design Automation of Electronic Systems;2023-12-18

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