Comparative analysis of OpenCL and RTL for sort-merge primitives on FPGA-Reference-Cited by-同舟云学术

Comparative analysis of OpenCL and RTL for sort-merge primitives on FPGA

Published:2020-06-14 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 16th International Workshop on Data Management on New Hardware
language:
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Author:

Moghaddamfar Mehdi¹,Färber Christian²,Lehner Wolfgang¹,May Norman³

Affiliation:

1. TU Dresden

2. Intel Corporation

3. SAP SE

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3399666.3399897

Reference23 articles.

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2. A Comparative Evaluation of High-Level Hardware Synthesis Using Reed–Solomon Decoder

3. An empirical evaluation of High-Level Synthesis languages and tools for database acceleration

4. Hardware acceleration of database operations

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